Current mode sense amplifiers (CSAs) have been used in integrated circuits to sense and amplify differential input currents. In applications in semiconductor memory, for example, the CSAs are often used to sense and amplify input currents resulting from reading memory cell data and being provided over long signal lines. As a result, the input currents are typically very weak and low in magnitude. In applications such as these, control of the CSA's loop gain is important because it affects the operating characteristics of the CSA. For example, where the loop gain of a CSA is approximately equal to 1, the dominant mode of operation for the CSA is sensing differential input currents. In contrast, as the loop gain of a CSA increases to be greater than 1, the dominant mode of operation for the CSA transitions from current sensing to behaving as a latch circuit. Thus, controlling loop gain is desirable in order to control the behavior of the CSA.
FIG. 1 illustrates a conventional current mode sense amplifier (CSA) 100. The CSA 100 includes a pair of cross coupled p-channel field effect transistors (PFET) 106, 116 and diode coupled PFET transistors 110, 120 to provide active loads. PFET bias transistors 102, 112 are coupled to the PFET transistors 106, 116 and biased by a bias voltage Vpbias. Differential input currents are applied to the input-output nodes 104, 114 from input-output lines Gio, GioF to be sensed and amplified by the CSA 100. As known, the loop gain of the CSA 100 is gmR, where gm is the transconductance of PFET transistors 106, 116 and R is the load provided by the PFET transistors 110, 120. As also known, the load for the diode coupled PFET transistors 110, 120 is 1/gm. As a result, the loop gain for the CSA 100 is approximately 1, and the loop gain remains substantially constant despite variations in factors affecting gm, such as process, voltage, and temperature (PVT). Although the CSA 100 has the benefit of a being able to maintain a substantially constant loop gain for changes in PVT, for operation a supply voltage Vcc for the CSA 100 should be greater than the sum of the threshold voltages of the transistors 106 (or 116) and transistors 110 (or 120), and a voltage margin for operation. In low voltage, low power systems, however, providing a supply voltage of this level is not desirable.
FIG. 2 illustrates another conventional CSA 200. The CSA 200 includes cross coupled PFET transistors 106, 116 and bias transistors 102, 112, as in the CSA 100. The active load diode coupled PFET transistors 110, 120 of the CSA 100 have been replaced by active loads n-channel field effect transistors (NFET) 210, 220 having gates coupled to Vcc to provide load R. An advantage of the CSA 200 over the CSA 100 is that a Vcc can be less than that for CSA 100. The Vcc only needs to be greater than the threshold voltage of the transistors 106 (or 116) plus a voltage margin, which is one transistor threshold voltage less than for the CSA 100. As with CSA 100, the loop gain of the CSA 200 is gmR. In contrast to the diode coupled PFET transistors 110, 120, PVT variation of the load provided by NFET transistors 210, 220 is not correlated with the gm of transistors 106, 116. As a result, the loop gain for the CSA 200 will vary more than the loop gain for the CSA 100 of FIG. 1 would vary with PVT variations. As previously discussed, a greater variance of loop gain will cause the CSA's operating characteristics to vary greater with PVT as well, which is typically an undesirable situation.